View 74AUP1G332GF_1100045.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

74AUP1G332
Low-power 3-input OR gate
Rev. 01.00 -- 27 February 2006 Preliminary data sheet
1. General description
The 74AUP1G332 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V. This device ensures a very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device is fully specified for partial Power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down. The 74AUP1G332 provides a single 3-input OR gate.
2. Features
s Wide supply voltage range from 0.8 V to 3.6 V s High noise immunity s Complies with JEDEC standards: x JESD8-12 (0.8 V to 1.3 V) x JESD8-11 (0.9 V to 1.65 V) x JESD8-7 (1.2 V to 1.95 V) x JESD8-5 (1.8 V to 2.7 V) x JESD8-B (2.7 V to 3.6 V) s ESD protection: x HBM JESD22-A114-C Class 3A. Exceeds 4000 V x MM JESD22-A115-A exceeds 200 V x CDM JESD22-C101-C exceeds 1000 V s Low static power consumption; ICC = 0.9 A (maximum) s Latch-up performance exceeds 100 mA per JESD 78 Class II s Inputs accept voltages up to 3.6 V s Low noise overshoot and undershoot < 10 % of VCC s IOFF circuitry provides partial Power-down mode operation s Multiple package options s Specified from -40 C to +85 C and -40 C to +125 C
Philips Semiconductors
74AUP1G332
Low-power 3-input OR gate
3. Quick reference data
Table 1: Quick reference data GND = 0 V; Tamb = 25 C; tr = tf 3 ns. Symbol Parameter Conditions CL = 5 pF; RL = 1 M; VCC = 0.8 V CL = 5 pF; RL = 1 M; VCC = 1.1 V to 1.3 V CL = 5 pF; RL = 1 M; VCC = 1.4 V to 1.6 V CL = 5 pF; RL = 1 M; VCC = 1.65 V to 1.95 V CL = 5 pF; RL = 1 M; VCC = 2.3 V to 2.7 V CL = 5 pF; RL = 1 M; VCC = 3.0 V to 3.6 V CI CPD input capacitance power dissipation capacitance VCC = 1.8 V; f = 1 MHz VCC = 3.3 V; f = 1 MHz
[1] [2] [1] [2]
Min 2.3 1.7 1.6 1.4 1.2 -
Typ 17.6 5.2 3.7 3.0 2.3 2.1 1.0 3.4 4.3
Max 10.2 6.0 4.7 3.3 2.9 -
Unit ns ns ns ns ns ns pF pF pF
tPHL, tPLH HIGH-to-LOW and LOW-to-HIGH propagation delay A, B and C to Y
[1]
CPD is used to determine the dynamic power dissipation (PD in W). PD = CPD x VCC2 x fi x N + (CL x VCC2 x fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; (CL x VCC2 x fo) = sum of the outputs. The condition is VI = GND to VCC.
[2]
4. Ordering information
Table 2: Ordering information Package Temperature range Name 74AUP1G332GW 74AUP1G332GM 74AUP1G332GF -40 C to +125 C -40 C to +125 C -40 C to +125 C SC-88 XSON6 XSON6 Description plastic surface mounted package; 6 leads Version SOT363 Type number
plastic extremely thin small outline package; no leads; SOT886 6 terminals; body 1 x 1.45 x 0.5 mm plastic extremely thin small outline package; no leads; SOT891 6 terminals; body 1 x 1 x 0.5 mm
74AUP1G332_1
(c) Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Preliminary data sheet
Rev. 01.00 -- 27 February 2006
2 of 18
Philips Semiconductors
74AUP1G332
Low-power 3-input OR gate
5. Marking
Table 3: Marking Marking code aG aG aG Type number 74AUP1G332GW 74AUP1G332GM 74AUP1G332GF
6. Functional diagram
1 2 6 B A C
001aad933
Y
4
1 2 6
1
4
001aad934
Fig 1. Logic symbol
Fig 2. IEC logic symbol
B A C
001aad935
Y
Fig 3. Logic diagram
7. Pinning information
7.1 Pinning
74AUP1G332 74AUP1G332
A GND 1 2 6 5 C GND VCC B B 3
001aad930
A
1
6
C
2
5
VCC
3
4
Y
4
Y
001aad931
Transparent top view
Fig 4. Pin configuration SOT363 (SC-88)
Fig 5. Pin configuration SOT886 (XSON6)
74AUP1G332_1
(c) Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Preliminary data sheet
Rev. 01.00 -- 27 February 2006
3 of 18
Philips Semiconductors
74AUP1G332
Low-power 3-input OR gate
74AUP1G332
A GND B 1 2 3 6 5 4 C VCC Y
001aad932
Transparent top view
Fig 6. Pin configuration SOT891 (XSON6)
7.2 Pin description
Table 4: Symbol A GND B Y VCC C Pin description Pin 1 2 3 4 5 6 Description data input A ground (0 V) data input B data output Y supply voltage data input C
8. Functional description
8.1 Function table
Table 5: Input A H X X L
[1]
Function table [1] Output B X H X L C X X H L Y H H H L
H = HIGH voltage level; L = LOW voltage level; X = don't care.
74AUP1G332_1
(c) Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Preliminary data sheet
Rev. 01.00 -- 27 February 2006
4 of 18
Philips Semiconductors
74AUP1G332
Low-power 3-input OR gate
9. Limiting values
Table 6: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol VCC IIK VI IOK VO IO ICC IGND Tstg Ptot
[1] [2]
Parameter supply voltage input clamping current input voltage output clamping current output voltage output current quiescent supply current ground current storage temperature total power dissipation
Conditions VI < 0 V
[1]
Min -0.5 -0.5 [1]
Max +4.6 -50 +4.6 -50 +4.6 20 +50 -50 +150 250
Unit V mA V mA V mA mA mA C mW
VO < 0 V active mode and Power-down mode VO = 0 V to VCC
-0.5 -65
Tamb = -40 C to +125 C
[2]
-
The minimum input and output voltage ratings may be exceeded if the input and output current ratings are observed. For SC-88 packages: above 87.5 C the value of Ptot derates linearly with 4.0 mW/K. For XSON6 packages: above 45 C the value of Ptot derates linearly with 2.4 mW/K.
10. Recommended operating conditions
Table 7: Symbol VCC VI VO Tamb t/V Recommended operating conditions Parameter supply voltage input voltage output voltage ambient temperature input transition rise and fall rate VCC = 0.8 V to 3.6 V active mode Power-down mode; VCC = 0 V Conditions Min 0.8 0 0 0 -40 0 Max 3.6 3.6 VCC 3.6 +125 200 Unit V V V V C ns/V
74AUP1G332_1
(c) Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Preliminary data sheet
Rev. 01.00 -- 27 February 2006
5 of 18
Philips Semiconductors
74AUP1G332
Low-power 3-input OR gate
11. Static characteristics
Table 8: Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Tamb = 25 C VIH HIGH-state input voltage VCC = 0.8 V VCC = 0.9 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V VIL LOW-state input voltage VCC = 0.8 V VCC = 0.9 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V VOH HIGH-state output voltage VI = VIH or VIL IO = -20 A; VCC = 0.8 V to 3.6 V IO = -1.1 mA; VCC = 1.1 V IO = -1.7 mA; VCC = 1.4 V IO = -1.9 mA; VCC = 1.65 V IO = -2.3 mA; VCC = 2.3 V IO = -3.1 mA; VCC = 2.3 V IO = -2.7 mA; VCC = 3.0 V IO = -4.0 mA; VCC = 3.0 V VOL LOW-state output voltage VI = VIH or VIL IO = 20 A; VCC = 0.8 V to 3.6 V IO = 1.1 mA; VCC = 1.1 V IO = 1.7 mA; VCC = 1.4 V IO = 1.9 mA; VCC = 1.65 V IO = 2.3 mA; VCC = 2.3 V IO = 3.1 mA; VCC = 2.3 V IO = 2.7 mA; VCC = 3.0 V IO = 4.0 mA; VCC = 3.0 V II IOFF IOFF ICC ICC CI CO input leakage current power-off leakage current additional power-off leakage current quiescent supply current VI = GND to 3.6 V; VCC = 0 V to 3.6 V VI or VO = 0 V to 3.6 V; VCC = 0 V VI or VO = 0 V to 3.6 V; VCC = 0 V to 0.2 V VI = GND or VCC; IO = 0 A; VCC = 0.8 V to 3.6 V 1.0 1.8 0.1 0.3 x VCC 0.31 0.31 0.31 0.44 0.31 0.44 0.1 0.2 0.2 0.5 40 V V V V V V V V A A A A A pF pF VCC - 0.1 1.11 1.32 2.05 1.9 2.72 2.6 V V V V V V V V 0.75 x VCC 0.70 x VCC 0.65 x VCC 1.6 2.0 V V V V Conditions Min Typ Max Unit
0.30 x VCC V 0.35 x VCC V 0.7 0.9 V V
additional quiescent supply VI = VCC - 0.6 V; IO = 0 A; current VCC = 3.3 V input capacitance output capacitance VCC = 0 V to 3.6 V; VI = GND or VCC VO = GND; VCC = 0 V
74AUP1G332_1
(c) Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Preliminary data sheet
Rev. 01.00 -- 27 February 2006
6 of 18
Philips Semiconductors
74AUP1G332
Low-power 3-input OR gate
Table 8: Static characteristics ...continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Tamb = -40 C to +85 C VIH HIGH-state input voltage VCC = 0.8 V VCC = 0.9 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V VIL LOW-state input voltage VCC = 0.8 V VCC = 0.9 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V VOH HIGH-state output voltage VI = VIH or VIL IO = -20 A; VCC = 0.8 V to 3.6 V IO = -1.1 mA; VCC = 1.1 V IO = -1.7 mA; VCC = 1.4 V IO = -1.9 mA; VCC = 1.65 V IO = -2.3 mA; VCC = 2.3 V IO = -3.1 mA; VCC = 2.3 V IO = -2.7 mA; VCC = 3.0 V IO = -4.0 mA; VCC = 3.0 V VOL LOW-state output voltage VI = VIH or VIL IO = 20 A; VCC = 0.8 V to 3.6 V IO = 1.1 mA; VCC = 1.1 V IO = 1.7 mA; VCC = 1.4 V IO = 1.9 mA; VCC = 1.65 V IO = 2.3 mA; VCC = 2.3 V IO = 3.1 mA; VCC = 2.3 V IO = 2.7 mA; VCC = 3.0 V IO = 4.0 mA; VCC = 3.0 V II IOFF IOFF ICC ICC input leakage current power-off leakage current additional power-off leakage current quiescent supply current VI = GND to 3.6 V; VCC = 0 V to 3.6 V VI or VO = 0 V to 3.6 V; VCC = 0 V VI or VO = 0 V to 3.6 V; VCC = 0 V to 0.2 V VI = GND or VCC; IO = 0 A; VCC = 0.8 V to 3.6 V 0.1 0.3 x VCC 0.37 0.35 0.33 0.45 0.33 0.45 0.5 0.5 0.6 0.9 50 V V V V V V V V A A A A A VCC - 0.1 0.7 x VCC 1.03 1.30 1.97 1.85 2.67 2.55 V V V V V V V V 0.70 x VCC 0.65 x VCC 1.6 2.0 V V V V Conditions Min Typ Max Unit
0.30 x VCC V 0.35 x VCC V 0.7 0.9 V V
additional quiescent supply VI = VCC - 0.6 V; IO = 0 A; current VCC = 3.3 V
74AUP1G332_1
(c) Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Preliminary data sheet
Rev. 01.00 -- 27 February 2006
7 of 18
Philips Semiconductors
74AUP1G332
Low-power 3-input OR gate
Table 8: Static characteristics ...continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Tamb = -40 C to +125 C VIH HIGH-state input voltage VCC = 0.8 V VCC = 0.9 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V VIL LOW-state input voltage VCC = 0.8 V VCC = 0.9 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V VOH HIGH-state output voltage VI = VIH or VIL IO = -20 A; VCC = 0.8 V to 3.6 V IO = -1.1 mA; VCC = 1.1 V IO = -1.7 mA; VCC = 1.4 V IO = -1.9 mA; VCC = 1.65 V IO = -2.3 mA; VCC = 2.3 V IO = -3.1 mA; VCC = 2.3 V IO = -2.7 mA; VCC = 3.0 V IO = -4.0 mA; VCC = 3.0 V VOL LOW-state output voltage VI = VIH or VIL IO = 20 A; VCC = 0.8 V to 3.6 V IO = 1.1 mA; VCC = 1.1 V IO = 1.7 mA; VCC = 1.4 V IO = 1.9 mA; VCC = 1.65 V IO = 2.3 mA; VCC = 2.3 V IO = 3.1 mA; VCC = 2.3 V IO = 2.7 mA; VCC = 3.0 V IO = 4.0 mA; VCC = 3.0 V II IOFF IOFF ICC ICC input leakage current power-off leakage current additional power-off leakage current quiescent supply current VI = GND to 3.6 V; VCC = 0 V to 3.6 V VI or VO = 0 V to 3.6 V; VCC = 0 V VI or VO = 0 V to 3.6 V; VCC = 0 V to 0.2 V VI = GND or VCC; IO = 0 A; VCC = 0.8 V to 3.6 V 0.11 0.41 0.39 0.36 0.50 0.36 0.50 0.75 0.75 0.75 1.4 75 V V V V V V V A A A A A 0.33 x VCC V VCC - 0.11 0.6 x VCC 0.93 1.17 1.77 1.67 2.40 2.30 V V V V V V V V 0.75 x VCC 0.70 x VCC 1.6 2.0 V V V V Conditions Min Typ Max Unit
0.25 x VCC V 0.30 x VCC V 0.7 0.9 V V
additional quiescent supply VI = VCC - 0.6 V; IO = 0 A; current VCC = 3.3 V
74AUP1G332_1
(c) Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Preliminary data sheet
Rev. 01.00 -- 27 February 2006
8 of 18
Philips Semiconductors
74AUP1G332
Low-power 3-input OR gate
12. Dynamic characteristics
Table 9: Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 8 Symbol tPHL, tPLH Parameter HIGH-to-LOW and LOW-to-HIGH propagation delay A, B and C to Y Conditions see Figure 7 VCC = 0.8 V VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V Tamb = 25 C; CL = 10 pF tPHL, tPLH HIGH-to-LOW and LOW-to-HIGH propagation delay A, B and C to Y see Figure 7 VCC = 0.8 V VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V Tamb = 25 C; CL = 15 pF tPHL, tPLH HIGH-to-LOW and LOW-to-HIGH propagation delay A, B and C to Y see Figure 7 VCC = 0.8 V VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V Tamb = 25 C; CL = 30 pF tPHL, tPLH HIGH-to-LOW and LOW-to-HIGH propagation delay A, B and C to Y see Figure 7 VCC = 0.8 V VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V 3.6 3.2 3.0 2.8 2.6 36.3 9.2 6.4 5.3 4.4 4.2 17.9 10.4 8.3 6.2 5.5 ns ns ns ns ns ns 2.9 2.5 2.2 2.0 1.9 23.6 6.9 4.9 4.0 3.3 3.1 13.5 7.8 6.2 4.7 4.2 ns ns ns ns ns ns 2.5 2.2 2.1 1.7 1.5 17.6 6.1 4.3 3.5 2.9 2.6 11.9 7.1 5.4 4.0 3.7 ns ns ns ns ns ns 2.3 1.7 1.6 1.4 1.2 17.6 5.2 3.7 3.0 2.3 2.1 10.2 6.0 4.7 3.3 2.9 ns ns ns ns ns ns Min Typ
[1]
Max
Unit
Tamb = 25 C; CL = 5 pF
74AUP1G332_1
(c) Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Preliminary data sheet
Rev. 01.00 -- 27 February 2006
9 of 18
Philips Semiconductors
74AUP1G332
Low-power 3-input OR gate
Table 9: Dynamic characteristics ...continued Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 8 Symbol CPD Parameter Conditions
[2] [3]
Min
Typ
[1]
Max
Unit
Tamb = 25 C power dissipation capacitance f = 1 MHz VCC = 0.8 V VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V
[1] [2] All typical values are measured at nominal VCC. CPD is used to determine the dynamic power dissipation (PD in W). PD = CPD x VCC2 x fi x N + (CL x VCC2 x fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; (CL x VCC2 x fo) = sum of the outputs. The condition is VI = GND to VCC.
-
3.1 3.2 3.2 3.4 3.8 4.3
-
pF pF pF pF pF pF
[3]
Table 10: Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 8 Symbol CL = 5 pF tPHL, tPLH HIGH-to-LOW and LOW-to-HIGH propagation delay A, B and C to Y see Figure 7 VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V CL = 10 pF tPHL, tPLH HIGH-to-LOW and LOW-to-HIGH propagation delay A, B and C to Y see Figure 7 VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V 2.4 2.0 1.9 1.5 1.4 12.0 7.3 5.8 4.5 3.9 2.4 2.0 1.9 1.5 1.4 12.0 7.6 6.1 4.7 4.1 ns ns ns ns ns 2.0 1.9 1.4 1.2 1.1 10.3 6.4 5.2 3.7 3.1 2.0 1.9 1.4 1.2 1.1 10.3 6.6 5.4 3.9 3.3 ns ns ns ns ns Parameter Conditions -40 C to +85 C Min Max -40 C to +125 C Min Max Unit
74AUP1G332_1
(c) Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Preliminary data sheet
Rev. 01.00 -- 27 February 2006
10 of 18
Philips Semiconductors
74AUP1G332
Low-power 3-input OR gate
Table 10: Dynamic characteristics ...continued Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 8 Symbol CL = 15 pF tPHL, tPLH HIGH-to-LOW and LOW-to-HIGH propagation delay A, B and C to Y see Figure 7 VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V CL = 30 pF tPHL, tPLH HIGH-to-LOW and LOW-to-HIGH propagation delay A, B and C to Y see Figure 7 VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V 3.5 3.3 2.9 1.6 1.4 18.4 11.4 9.1 6.7 6.4 3.5 3.3 2.9 1.6 1.4 18.7 11.9 9.6 7.1 6.7 ns ns ns ns ns 2.7 2.4 2.1 1.6 1.7 13.6 8.5 6.8 5.2 4.5 2.7 2.4 2.1 1.6 1.7 13.6 8.8 7.1 5.4 4.8 ns ns ns ns ns Parameter Conditions -40 C to +85 C Min Max -40 C to +125 C Min Max Unit
13. Waveforms
VI A, B, C input GND t PHL VOH Y output VOL VM
001aad936
VM
t PLH
Measurement points are given in Table 11. Logic levels: VOL and VOH are typical output voltage drop that occur with the output load.
Fig 7. Input A, B and C to output Y propagation delay times. Table 11: VCC 0.8 V to 3.6 V Measurement points Output VM 0.5 x VCC Input VM 0.5 x VCC VI VCC tr = tf 3.0 ns
Supply voltage
74AUP1G332_1
(c) Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Preliminary data sheet
Rev. 01.00 -- 27 February 2006
11 of 18
Philips Semiconductors
74AUP1G332
Low-power 3-input OR gate
VCC
VEXT
5 k
PULSE GENERATOR
VI
VO
DUT
RT CL RL
001aac521
Test data is given in Table 12. Definitions for test circuit: RL = Load resistance. CL = Load capacitance including jig and probe capacitance RT = Termination resistance should be equal to the output impedance Zo of the pulse generator VEXT = External voltage for measuring switching times.
Fig 8. Load circuitry for switching times Table 12: VCC 0.8 V to 3.6 V
[1]
Test data Load CL RL
[1]
Supply voltage
VEXT tPLH, tPHL tPZH, tPHZ GND tPZL, tPLZ 2 x VCC
5 pF, 10 pF, 5 k or 1 M open 15 pF and 30 pF
For measuring enable and disable times RL = 5 k, for measuring propagation delays, setup and hold times and pulse width RL = 1 M
74AUP1G332_1
(c) Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Preliminary data sheet
Rev. 01.00 -- 27 February 2006
12 of 18
Philips Semiconductors
74AUP1G332
Low-power 3-input OR gate
14. Package outline
Plastic surface mounted package; 6 leads SOT363
D
B
E
A
X
y
HE
vMA
6
5
4
Q
pin 1 index
A
A1
1
e1 e
2
bp
3
wM B detail X Lp
c
0
1 scale
2 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A 1.1 0.8 A1 max 0.1 bp 0.30 0.20 c 0.25 0.10 D 2.2 1.8 E 1.35 1.15 e 1.3 e1 0.65 HE 2.2 2.0 Lp 0.45 0.15 Q 0.25 0.15 v 0.2 w 0.2 y 0.1
OUTLINE VERSION SOT363
REFERENCES IEC JEDEC JEITA SC-88
EUROPEAN PROJECTION
ISSUE DATE 97-02-28 04-11-08
Fig 9. Package outline SOT363 (SC-88)
74AUP1G332_1 (c) Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Preliminary data sheet
Rev. 01.00 -- 27 February 2006
13 of 18
Philips Semiconductors
74AUP1G332
Low-power 3-input OR gate
XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1.45 x 0.5 mm
SOT886
b 1 2 3 4x L1 L
(2)
e
6 e1
5 e1
4
6x
(2)
A
A1 D
E
terminal 1 index area 0 DIMENSIONS (mm are the original dimensions) UNIT mm A (1) max 0.5 A1 max 0.04 b 0.25 0.17 D 1.5 1.4 E 1.05 0.95 e 0.6 e1 0.5 L 0.35 0.27 L1 0.40 0.32 1 scale 2 mm
Notes 1. Including plating thickness. 2. Can be visible in some manufacturing processes. OUTLINE VERSION SOT886 REFERENCES IEC JEDEC MO-252 JEITA EUROPEAN PROJECTION ISSUE DATE 04-07-15 04-07-22
Fig 10. Package outline SOT886 (XSON6)
74AUP1G332_1 (c) Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Preliminary data sheet
Rev. 01.00 -- 27 February 2006
14 of 18
Philips Semiconductors
74AUP1G332
Low-power 3-input OR gate
XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1 x 0.5 mm
SOT891
1
2
b 3
L1 e
L
6 e1
5 e1
4
A
A1 D
E
terminal 1 index area 0 1 scale 2 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A max 0.5 A1 max 0.04 b 0.20 0.12 D 1.05 0.95 E 1.05 0.95 e 0.55 e1 0.35 L 0.35 0.27 L1 0.40 0.32
OUTLINE VERSION SOT891
REFERENCES IEC JEDEC JEITA
EUROPEAN PROJECTION
ISSUE DATE 05-03-11 05-04-06
Fig 11. Package outline SOT891 (XSON6)
74AUP1G332_1 (c) Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Preliminary data sheet
Rev. 01.00 -- 27 February 2006
15 of 18
Philips Semiconductors
74AUP1G332
Low-power 3-input OR gate
15. Abbreviations
Table 13: Acronym CDM CMOS DUT ESD HBM MM TTL Abbreviations Description Charged Device Model Complementary Metal Oxide Semiconductor Device Under Test ElectroStatic Discharge Human Body Model Machine Model Transistor Transistor Logic
16. Revision history
Table 14: Revision history Release date 20060227 Data sheet status Preliminary data sheet Change notice Doc. number Supersedes Document ID 74AUP1G332_1
74AUP1G332_1
(c) Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Preliminary data sheet
Rev. 01.00 -- 27 February 2006
16 of 18
Philips Semiconductors
74AUP1G332
Low-power 3-input OR gate
17. Data sheet status
Level I II Data sheet status [1] Objective data Preliminary data Product status [2] [3] Development Qualification Definition This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN).
III
Product data
Production
[1] [2] [3]
Please consult the most recently issued data sheet before initiating or completing a design. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
18. Definitions
Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes -- Philips Semiconductors reserves the right to make changes in the products - including circuits, standard cells, and/or software - described or contained herein in order to improve design and/or performance. When the product is in full production (status `Production'), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.
20. Trademarks
Notice -- All referenced brands, product names, service names and trademarks are the property of their respective owners.
19. Disclaimers
Life support -- These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors
21. Contact information
For additional information, please visit: http://www.semiconductors.philips.com For sales office addresses, send an email to: sales.addresses@www.semiconductors.philips.com
74AUP1G332_1
(c) Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Preliminary data sheet
Rev. 01.00 -- 27 February 2006
17 of 18
Philips Semiconductors
74AUP1G332
Low-power 3-input OR gate
22. Contents
1 2 3 4 5 6 7 7.1 7.2 8 8.1 9 10 11 12 13 14 15 16 17 18 19 20 21 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data . . . . . . . . . . . . . . . . . . . . . 2 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 3 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 Functional description . . . . . . . . . . . . . . . . . . . 4 Function table . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5 Recommended operating conditions. . . . . . . . 5 Static characteristics. . . . . . . . . . . . . . . . . . . . . 6 Dynamic characteristics . . . . . . . . . . . . . . . . . . 9 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 13 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 16 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 17 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Contact information . . . . . . . . . . . . . . . . . . . . 17
(c) Koninklijke Philips Electronics N.V. 2006
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Date of release: 27 February 2006 Document number: 74AUP1G332_1
Published in The Netherlands

▲Up To Search▲

Price & Availability of 74AUP1G332GF

	To Download 74AUP1G332GF Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .